22-11-2022: Design of the noise performance of negative feedback amplifiers¶
Lecture: EE4109-3
Location: Pi
Time: 15:45 - 17:30
Goal of this lecture
At the end of this lecture the student should:
Knows the noise contributers in negative feedfack amplifiers
Understands strategies and methods to minimize the noise contribution of negative feedback amplifiers
Knows the noise mechanisms in CMOS transistors
Can evaluate the best possible geometry and operating conditions of a CMOS stage for minimizing its noise contribution
Prerequisite knowledge and skills¶
Chapter 2, Chapter 7, and Chapter 19 of Structured Electronics Design
The following topics from the Homologation course:
Chapters to study¶
Chapter 4, Chapter 5, and Chapter 6 of Structured Electronics Design
Part 1¶
Noise addition in negative feedback amplifiers
Feedback networks
Controller noise
Power supply noise
Design strategy low-noise negative feedback amplifiers
Design of low-noise feedback configurations
Design of port isolation
Preferred properties of the controller’s input stage
Noise impedance matching
CS stage noise model
Differential pair noise model
Part 2¶
Minimization of the noise contribution of the controller’s input stage
Optimization of device geometry and operating current
Downloads¶
Poster CS stage noise design
LTspice and SLiCAP files Chapter5.zip