30-11-2023: Application of balancing techniques

30-11-2023: Application of balancing techniques#

Lecture: EE4109-6

Location: Pulse Hall 4

Time: 08:45 - 10:30

color coded resistors

Quiz#




Balancing#

Introduction to balancing

Balancing is a compensation technique. With this error reduction technique it is possible to reduce the adverse effects of reproducible errors.

Balancing techniques can be used to create odd transfer functions. By doing so, the influence of biasing errors on the static transfer of balanced amplifier stages is much less less than of unbalanced stages.

Odd transfer functions with a compressing or an expanding V-I transfer can be realized with anti-series or anti-parallel connections of unbalanced elements

Presentation

The presentation Introduction to balancing introduces the concepts of additive compensation and balancing.

Video

EE4109 2020 6_1: Introduction to balancing

Balancing of two-terminal elements

Anti-series or complementary-series conection of two biased nonlinear two-terminal elements results in an element with an odd ci(v) characteristic of which the bias voltages of the two-terminal device are converted into common-mode bias voltages of the anti-series connection.

Anti-parallel or complementary-parallel connection of two biased nonlinear two-terminal elements results in an element with an odd i(v) characteristic of which the bias currents of the two-terminal device are converted into common-mode bias currents of the anti-parallel connection.

The small-signal v(i) relation, as well as the stationary noise behavior of such connections can easily be related to those of the biased two-terminal elements of which is is constituted.

Presentation

The presentation "Balancing of two-terminal elements" illustrates the application of balancing techniques using two-terminal elements only.

Video

EE4109 2020 6_2: Balancing of two-terminal elements

Balancing of two-ports

Anti-series connection of two (equal) biased nonlinear two-ports or series connection of two complementary two-ports results in a two-port with an odd i(v) characteristic, and of which the bias voltages of the two-ports are converted into common-mode bias voltages of the anti-series connection.

Anti-parallel connection of two (equal) biased nonlinear two-ports, or paralell conccetion of two complementary two-ports results in a two-port with an odd i(v) characteristic, and of which the bias currents of the two-ports are converted into common-mode bias currents of the anti-parallel connection.

The small-signal v(i) relation, as well as the stationary noise behavior of such connections can easily be related to those of the biased two-ports of which it is constituted.

Presentation

The presentation "Balancing of two-ports" illustrates the application of balancing techniques using two-ports.

Video

EE4109 2020 6_3: Balancing of two-ports

Balancing: differential pair

The differential-pair can be considered an anti-series connection of two CS stages. By doing so, its properties can easily be related to those of the CS stage.

Presentation

The presentation "Balancing: differential pair" relates the large-signal and the small-signal static and dynamic transfer, as well as the stationary noise performance of the differential pair to the corresponding properties of the CS stage.

Download

LTspice differential pair simulation: Chapter 6.4.2.

Video

EE4109 2020 6_4: Balancing, differential pair

Balancing: push-pull stage

The push-pull stage can be considered a complementary-parallel connection of two CS stages. By doing so, its properties can easily be related to those of the CS stage.

Presentation

The presentation "Balancing: push-pull stage" relates the large-signal and the small-signal static and dynamic transfer, as well as the stationary noise performance of the push-pull stage to the corresponding properties of the CS stage.

Download

LTspice push-pull stage simulation: Chapter 6.4.3.

Video

EE4109 2020 6_5: Balancing, push-pull stage

Poster#

Balanced stages

Group exercise#

  1. Continue with the exercise from the previous lecture

  2. If we would like to use a differential pair (anti-series connected CS stage) as input stage of A1, what would be the consequences for the design of the noise performance of the amplifier.